Digital Logic Simulator |
| Description: | Here's a digital circuit simulator for the HP 48. It has 8 internal primitives: AND, OR, XOR, NOT, BUF (buffer), HI (node tied to logic 1), LO (node tied to logic 0) and CLK (clock generator of definable high and low times). It also supports nested macros defined from these elements. |
| Filename: | digsimul.zip |
| ID: | 2144 |
| Author: | Tony Duell |
| Downloaded file size: | 6,533 bytes |
| Size on calculator: | 4 KB |
| Platforms: | 48 |
| User rating: | Not yet rated (you must be logged in to vote) |
| Primary category: | Science/Electricity |
| Languages: | ENG |
| File date: | 1993-10-26 00:00:00 |
| Creation date: | 1990-10-15 |
| Source code: | Not included |
| Download count: | 17,231 |
| Version history: | 1997-08-21: Added to site
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| Archive contents: | Length Date Time Name
--------- ---------- ----- ----
3857 1992-04-10 16:44 DIGSIMUL
4138 1993-08-20 14:59 DIGSIMUL.SRC
7457 1993-07-23 10:25 DIGSIMUL.TXT
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15452 3 files |
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